1. Field of the Invention
This invention relates to integrated circuits, and particularly to metal oxide semiconductor large scale integrated circuit (MOS LSI) devices having n-channel or p-channel MOS field effect transistors, such as are commonly used in hand calculators, home and office computers, automotive and industrial control systems and other commercial products. MOS LSI devices use numerous circuit designs to achieve specific functions. One of the circuit designs used in MOS LSI devices is a tristate driver circuit, i.e., a circuit which has a first or logic 1 state, a second or logic 0 state and a third or float state operation as output states, and which interfaces with and functions to drive output loads, normally external to the MOS LSI, in response to low power signal sources within the MOS LSI, and to disconnect the tristate driver circuit output from the output load when commanded to begin float state operation, in response to a float command.
The advantage that a tristate driver circuit has over a two state driver circuit (no float state) is that when the former circuit is commanded to the third or float state, no voltage is provided to the output load. The output of the circuit appears to be disconnected from the output load. The outputs of more than one tristate driver circuit can therefore be connected to the same output load.
The principal advantage of this tristate driver circuit is that it substantially reduces the internal power consumption with no sacrifice in speed. This makes it possible to expand the number of circuits available in a given MOS LSI device where the available power is limited.
2. Description of the Prior Art
Presently known tristate driver circuits are usually comprised of: NOR gates; buffer switches for pulling up the output of the NOR gates; and an output driver stage that applies voltage to the output load. Such tristate driver circuits dissipate the greatest amount of system power when the float state, because the NOR circuits used in these tristate driver circuits rely on a buffer switch to provide power to the output of the NOR gate. The buffer switches used in MOS LSI devices can be made highly conductive or slightly conductive, but they can not be cut off completely. With the output of the NOR circuit low, the respective buffer switch must drop the power supply voltage (V.sub.DD -V.sub.SS), and the power dissipated in the buffer switch is undesirably high, because the switch continues to provide a small bias current although turned off.
Patents in the field of the invention include: U.S. Pat. No. 4,194,131, "TRISTATE LOGIC BUFFER CIRCUIT WITH ENHANCED DYNAMIC RESPONSE" and U.S. Pat. No. 4,194,132, "TRISTATE LOGIC BUFFER CIRCUIT WITH REDUCED POWER CONSUMPTION" both issued on Mar. 18, 1980 to Dale A. Mrazek. Both of these patents differ substantially in topology from the present invention and neither teaches method or means for reducing the power consumed in a tristate driver circuit using MOS FET transistors.